Programmable logic controller | Electrical Engineering homework help

Programmable logic controller | Electrical Engineering homework help

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Programmable Logic Controller
Final Project
1 Purpose……………………………………………………………………………………………………….
2 Objectives………………………………………………………………………………………………… 
3 Equipment, Components and Simulation Software……………………………………
4 Pre-Lab……………………………………………………………………………………………………….
5 Process Descriptions  
6 References…………………………………………………………………………………………………  
1 Purpose 
The purpose of the final project is to design and document the ladder logic diagram to control two pumps as described below. 
2 Objectives 
At the end of the final project, you will be able: 
1. To implement the concepts learnt through out this course for designing a  process control  project 
2. Work in a design team to successfully design and implement a control design project 
3. How to analyze and test the operation of systems made of several logic components. 
3 Equipment, Components and Simulation Software 
For this final project, the student will need the following: 
• LogixPro simulation software
4 Pre-Lab 
Throughout these lab exercises we have learned the fundamental of building blocks of control systems. This final project is intended to give you a strategic plan for managing projects while learning about control systems and the modern tools used to develop them. The steps that should be followed to build a successful design project are as follows: 
a) Overall definition of the scope of the project. 
b) Strategic planning to break the project into smaller subsystem or blocks. 
c) Testing of each  block separately, and 
d) Integration of the whole system and testing it finally. 
a. Overall Definition: 
The first step in any project is to thoroughly determine the scope of the project, i.e. what are the tools required for the project, do you understand fully how this tools should operate, etc. 
b. Strategic Planning: 
The second step involves developing a strategy to divide the project into smaller blocks. Each block should satisfy the requirements given below: 
b1) Each block must fit together to make up the whole system. 
b2) A way to test each block must be developed. 
b3) The nature of all the signals that connect these pieces should be known. 
b4) Exact operation of each block should be thoroughly defined. 
c. Testing: 
Each subsystem or block should be built starting at the simplest level and testing it thoroughly. This is often accomplished through some sort of simulation. When a circuit is simulated on a computer, the designer must create all the different scenarios that will be experienced by the actual circuit and also must know what the proper response to those inputs should be. 
d. System Integration and Testing: 
The last step involved in the project design process is to put the blocks together and test them as a unit. Blocks should be added and tested at each stage until the entire project is working. 
5 Process Description
5.1 Process Description
High flow rate storm rain water is channeled to two large wet wells, the east wet well and the west wet well. The water is pumped from the two connected wells at constant rate using a predefined process sequence control. Two motor derived constant speed immersed pumps are used, one in the east wet well and one in the west wet well.
Each pump is equipped with an overload alarm switch, which is used to trigger any unusual conditions such as over temperature or load. The motors provide an input discrete signal indicating if the motor is running or not. They can also started by activating the Push Button located on the local panel if the AUTO/MAN switch is in manual.
Three float switches are used to provide an accurate indication of the water level at three pre-specified critical east / west wet well. The Low Level Float switch triggers the stopping of the running pump. The High level Float switch triggers the starting of the scheduled pump. If the scheduled pump fails to start within 5 seconds, the second pump is selected. An alarm must be issued in order to alert the operator of the failure. The Very High level Float switch triggers the starting of both pumps. If either of the two pumps fails to start the corresponding alarm is activated by the control.
Pumps are scheduled to run according to an operator pre-defined calendar. This input is expected in hours of accumulated total pump run time. The two pumps must alternate according to available calendar while the water level is below the Very High Level and above the Low Level. The two pumps run at levels above the Very High Level and cascaded timers are not altered during this condition.
5.2 Input / Output Map
System Inputs
  
Tag Name

Address Number

Name Tags

Comments
 
Off Float

I:1/0

SS1

NO Wet Well Low   Level Float Switch
 
On Float

I:1/1

SS2

NO Wet Well High   Level Float Switch
 
Override Float

I:1/2

SS3

NO Wet Well Very   High Level Float Switch
 
E Pump Input 

I:1/3

SS4

East Wet Well Pump Running Input
 
W Pump Input

Bit Level

Internal Bit

West Wet Well Pump Running Input
 
E Pump Over Load

Bit Level

Internal Bit

East Pump Over Load Alarm
 
W Pump Over Load

Bit Level

Internal Bit

West Pump Over Load Alarm
System Outputs
  
Tag Name

Address Number

Name Tags

Comments
 
E Pump

O:2/0

Pl1

East Pump Run Output
 
W Pump

O:2/1

Pl2

West Pump Run Output
 
E Pump Common Alarm

O:2/2

PL3

Flash East Pilot   Light Common Alarm
 
W Pump Common Alarm

O:2/3

PL4

Flash West Pilot Light Common Alarm
Internal References 
  
T4:0

East Pump One Hour Accumulation Timer
 
T4:1

West Pump One Hour Accumulation Timer
 
C5:0

East Pump Cascaded Timer
 
C5:1

West Pump Cascaded Timer
 
N7:0

East/West Pump Alteration Bit
 
N7:5

East User Defined Hours Calendar 
 
N7:6

West User Defined Hours Calendar 

Figure 1. Block diagram of the entire program 
The function of each block in Figure 1 is as follows:
Initialization : 
The Initialization Subroutine will include all the system parameters required to start the project (resetting all timers, counters, register bits used in the program). 
Pump Start/Stop: 
The Pump Start/Stop Subroutine will include the logic to Start/Stop the pumps based on the three float switches indication of the water level at three pre-specified critical east / west wet well. 
Pump Alternation 
The Pump Alternation Subroutine will include the two pumps alternation logic according to available calendar while the water level is below the Very High Level and above the Low Level. 
Pump Alarms  
The Pump Alarm Subroutine will include two common Alarms. One for east wet well, and one for west well. Each common Alarm will be triggered from pump motor failed to start, Overload, or 
Initialization Logic: 
The initialization logic consists of defining the preset values for the timers and counters used in this project.  
One Hour Timer: 
The one Hour timer is reset to zero very time one Hour of accumulated time for each pump.
Counters: 
Counters should be used to extend the time for the pump alternation per calendar as defined by the user. 
One Shot: 
One shot logic will be used to increment N7:0 register to alternate between pumps every time the LSB Toggle. 
Common EAST/WEST Alarms: 
The common Alarm will trigger if any of the following occur:
Pump failed to start, Pump overload, or Instrumentation float failure.
6 References 
If you want to learn more about the topics related to this lab, see the following references:  
1. Programmable Logic Controller. By James Rehg and GlennSartori.
2. Programmable Logic Controller: Industrial control by Eman Kamel, PhD and Khaled Kamel, PhD.
Final Project Requirements 
1. Write a documented ladder logic program, and provide the system check out.
2. Prepare a power point presentation, 6 to 10 slides. 
3. Provide no more than 15 minutes presentation.

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